Job Information
Belcan Senior FPGA Developer in NEPEAN, Ontario
Senior FPGA Developer
Job Number: 348800
Category: Software Programming / Dev
Description: Title: SR FPGA Developer (2110 Video)
Full time permanent opportunity!
3 weeks vacation to start, RRSP matching and christmas shut down paid!
Location: Nepean, ON
Area code: 613, 343, and 753
Postal Code: K2E
Keywords: #FPGA.jobs #FPGA.Developer.jobs #FPGA.Design.Jobs
Your responsibilities:
Promote, refine, and develop innovative features that you are passionate about in the most integrated hyperconverged hardware platform in the broadcast industry.
Architect, design, implement, and test professional media transport solutions over SMPTE ST 2110/IP and SDI in high-performance FPGAs for Broadcast Routers
Implement complex RTL algorithms for video and audio processing.
Work closely with the management team to develop high-level design requirements,
Generate both specification and design documentation to support cross-functional teams.
Develop test features that can be utilized by Product Verification, Manufacturing, and Customer Support.
Work with other members of the team to verify the functionality of FPGA and HW designs through simulation and lab tests.
Thoroughly self-test all design parts and support Product Verification team throughout development, including test plan review, feedback validation, and logic/hardware issue debugging/fixing as required.
Support schematics development and board layout, frequently contributing directly to technical decisions relating to signal integrity, density, fabrication constraints, and thermal considerations.
Assist in supporting other staff members as necessary through the entire NPI process flow, from design, documentation, implementation, and test to presales and customer service.
What you need:
FPGA/Hardware designer with 5+ years of professional experience developing SMPTE ST 2110 and SDI-based video/audio technologies.
FPGA building blocks, system architectures, speed/area tradeoffs.
High-speed transceivers, physical implementation, clock domain analysis, and timing closure.
FPGA compilation, simulation, and hardware testing.
Intel and Xilinx FPGA devices.
FPGA design, simulation, and debugging tools.
External memory interface.
Packet processing, switching/routing, scheduling.
Fluent in FPGA hardware description and timing constraint languages: SystemVerilog (preferred), High-Level Synthesis (HLS), and VHDL, as well as TCL and SDC.
Assets:
Development experience with Ethernet Switches products and chips, unicast/multicast routing protocols, and P4 language a plus.
Experience with different broadcasting sync reference systems, including PTP, blackburst, and tri-level, a plus.
Ability to work in a Linux-based embedded environment, including command-line, file system, and networking skills a plus.
Knowledge of software languages such as C/C++, Bash, Python, and other design languages and scripts a plus.
Understanding of digital video, audio, and associated broadcast standards such as SDI, AES, time code, MADI, PTP, and NMOS a plus.
Location: NEPEAN , ON
Minimum Experience (yrs):
Required Education: Not Specified
Benefits:
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